System Verilog Intro Labs

These labs serve as an intro to digital design with SystemVerilog. They interactively teach concepts, and then walk you through developement process of writing in an HDL, simulating your design, and generating a bitstream. Better yet, all this is done in a Google Colaboratory Notebook so you don’t need to worry about configuring your machine.

Lab 1: Dataflow SystemVerilog colab

Lab 2: Arithmetic colab

Lab 3: Seven Segment Display colab

Lab 4: Stopwatch colab

Lab 5: State Machines colab