Building Hardware in Vivado

The Xilinx Vivado software allows you to create digital hardware circuits that can be programmed onto the FPGA. Some basics of Vivado:

  • The circuits are designed using hardware description languages (HDLs), such as Verilog or VHDL (as you may have done in ECEN 220).
  • Vivado contains an IP Repository, which is a collection of HDL modules that Xilinx provides to you. You are free to use these modules in your design.
  • Vivado provides a block diagram designer, called IP Integrator, which allows you to graphically connect the different modules in your design to make a complete system (The hardware system page shows the block diagram for the Vivado project we use in this class).

Accessing Vivado

Vivado is installed in the lab machines, that you can access remotely. Alternatively, you can download the Vivado tool on to your personal computer or VM.

Before you can run Xilinx tools, you must add them to your PATH (this must be done each time you open a new terminal):

source /tools/Xilinx/Vivado/2020.2/

Then you can run Vivado:


Vivado Projects

Creating the ECEN 427 Project in Vivado

Vivado projects can often contain hundreds of files. Rather than distribute a large project to you, we have given you a .tcl script that will create the Vivado project. (In addition, there are some files that are simply too large to commit to Git, so we have zipped them up.

If you go to the hw folder, and run make, it will unzip these files and create your Vivado project. It will also open the newly created project in the Vivado GUI.

Opening Your Existing Project

Creating the project only needs to be done once. In the future you can just do the following:

  1. Launch Vivado (vivado)
  2. Open your Vivado project, which should be listed under recent projects. If it isn’t listed there, you can always go to //File->Open Project// and browse to your Vivado project file (hw/ecen427/ecen427.xpr).
  3. Alternatively, you can run vivado hw/ecen427/ecen427.xpr

Committing your Vivado Project to Git

You will want to commit your changes to the Vivado project to Git. You shouldn’t attempt to commit the actual project files, as there are sometimes hundreds of files. Instead, you should follow these steps to update the Tcl file you used to create the project:

  1. File->Project->Write Tcl
  2. Make sure to check the box Recreate Block Designs using Tcl.
  3. For the output file, choose to replace the provided ecen427.tcl file.
  4. Commit the new ecen427.tcl file to Git.

Updating the Hardware

This section describes how to compile your changes in Vivado, and make them effective on the PYNQ board.

Compiling a new Bitstream

  1. The main function of the Vivado software is to compile your design to a bitstream. A bitstream (‘‘.bit’’ file) can be used to reconfigure the FPGA to implement your circuit. In Vivado, click Generate Bitstream. It will take a while to compile on the lab machines.
  2. The created bitstream, system_wrapper.bit, will be located in your Vivado project folder hw/ecen427/, in the subdirectory ecen427.runs/impl_1/. (It’s often a good idea to check the timestamp on the file to make sure it was indeed updated recently.)
  3. We provided you with a bitstream for the original hardware system, which is located at hw/ecen427.bit. After you change the hardware and generate a new bitstream, you need to replace this bitstream with your new one, before proceeding to the next step:
    cd hw
    cp ecen427/ecen427.runs/impl_1/system_wrapper.bit ecen427.bit

    or, more simply:

    cd hw
    make ecen427.bit
  4. The PYNQ board requires the bitstream in .bin format. Go to the device_tree folder in the top-level of your repo, and run make build to create a new ecen427.bit.bin file.
  5. Push the new ecen427.bit and ecen427.bit.bin file up to Github.

Loading the new Bitstream on your PYNQ board

On your PYNQ board:

  1. Run git pull to get your new hardware files that you just pushed up to the repo.
  2. Go to the device_tree folder.
  3. Run sudo make install to copy the new ecen427.bit.bin file into the system directory that is used to configure the FPGA (/lib/firmware). This command will instantly load the new hardware, as well as overrite the old bitstream, such that this new bitstream will be used anytime you reboot the board.