As an undergrad, you learned how to design digital circuits, first by connecting simple logic gates and flip-flops, and then by designing more complex circuits using a hardware description language (HDL), such as Verilog. This class is all about High-Level Synthesis (HLS), which focuses on creating higher-level abstractions for digital design. Rather than describing finite state machines and cycle-by-cyle circuit behavior using an HDL, HLS tools allow you to describe your circuit behavior using software-like descriptions, typically using C, C++, or OpenCL.
In this class you will first learn the behind-the-scenes algorithms that make it possible to create hardware from software, and then you will gain some experience using commerical HLS tools. Along the way you will learn about software compilers and various optimizations that allow us to create high-performance hardware designs.