ECEn 320The implementation process is the final step in the FPGA design flow. This process takes the synthesized design and maps it to the physical resources on the FPGA. The implementation process includes the following steps:
- Design optimization: this step performs additional optimizations on the netlist to reduce the design resources and improve design timing
- Placement: this step places each of the resources within the netlist to a specific location on the FPGA.
- Routing: this step routes the signals between the resources using the programmable routing resources available on the FPGA.
- Bitstream generation: this step generates the bitstream file that can be downloaded onto the FPGA.
Like the synthesis process, the implementation process is run within the ‘Vivado’ tool with specific Tcl commands. Open the vivado tool in ‘tcl’ mode and generate a log file for later review.
vivado -mode tcl -log implement_adder.log
This tutorial will walk you through all the steps for interactive implementation and then show you how to run the implementation in batch mode.
Interactive Implementation
1. Open the Checkpoint design
The first step is to open the synthesized design checkpoint file from the synthesis process:
Vivado% open_checkpoint binary_adder_synth.dcp
2. Run design optimization
Vivado% opt_design
3. Run placement
Vivado% place_design
4. Run Routing
Vivado% route_design
At the end of this step the design is completely implemented on the FPGA.
5. Generate Reports
Once the design has been implemented, you can generate reports that provide more details about the design. For this tutorial, generate the ‘utilization’ report (other reports will be generated in later labs).
Vivado% report_utilization -file utilization.rpt
6. Generate the design bitstream and dcp file
The following command generates the bitstream file that can be downloaded onto the FPGA:
write_bitstream -force binary_adder.bit
In addition to generating a bitstream, create a checkpoint file that can be used if you need to analyze the design further:
write_checkpoint -force binary_adder.dcp
Batch Implementation
The above example demonstrates how to perform implementation interactively.
It is more convenient to create a ‘.tcl’ script that runs all of these commands at once in batch mode.
Create a file named implement_adder.tcl that contains all the commands described above.
You can complete the full implementation process by running the following command:
vivado -mode batch -source implement_adder.tcl -log implement_adder.log -nojournal -notrace
The flags for this command are the same as those used in the synthesis command. As with the simulation and synthesis commands, implementation will generate a lot of temporary files that need to be ignored and cleaned. Run your implementation script to make sure that the binary_adder example properly implements.